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Rajesh Velegalati

Ph.D Candidate

Publications

  • Benjamin Brewster, Ekawat Homsirikamol, Rajesh Velegalati and Kris Gaj, Option Space Exploration Using Distributed Computing for Efficient Benchmarking of FPGA Cryptographic Modules, The 2012 International Conference on Field-Programmable Technology, FPT 2012, IEEE, Dec, 2012
  • R. Velegalati and J.-P. Kaps, Improving security of SDDL designs through interleaved placement on Xilinx FPGAs, Field Programmable Logic and Applications, FPL 2011, IEEE, pages 506–511, Sep, 2011 [Bibtex]
  • S. Shah, R. Velegalati, J.-P. Kaps, and D. Hwang, Investigation of DPA resistance of Block RAMs in cryptographic implementations on FPGAs, International Conference on ReConFigurable Computing and FPGAs – ReConFig'10, IEEE, pages 274–279, Dec, 2010 [Bibtex]
  • R. Velegalati and J.-P. Kaps, Techniques to enable the use of block RAMs on FPGAs with dynamic and differential logic, International Conference on Electronics, Circuits, and Systems, ICECS 2010, IEEE, pages 1251–1254, Dec, 2010 [Bibtex]
  • J.-P. Kaps and R. Velegalati, DPA resistant AES on FPGA using partial DDL, IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2010, IEEE, pages 273–280, May, 2010[Bibtex]
  • R. Velegalati and J.-P. Kaps, DPA resistance for light-weight implementations of cryptographic algorithms on FPGAs, Field Programmable Logic and Applications, FPL 2009, IEEE, pages 385–390, Aug, 2009 [Bibtex]
  • R. Velegalati, Securing light weight cryptographic implementations on FPGAs using dual rail with pre-charge logic, ECE Department, George Mason University, Fairfax, Virginia, USA, July, 2009, Master's Thesis [Bibtex]

Work-in-Progress

  • R. Velegalati and J.-P. Kaps, Introducing FOBOS: Flexible Open-source BOard for Side-channel analysis, Work in Progress (WiP), Third International Workshop on Constructive Side-Channel Analysis and Secure Design, COSADE 2012, May, 2012 [Bibtex]

Posters

  • Rajesh Velegalati, Kris Gaj, Jens-Peter Kaps, Venkata Amirineni, Marcin Rogawski, Ekawat Homsirikamol and Michal Varchola, ATHENa -- Automated Tool for Hardware EvaluatioN: Toward Fair and Comprehensive Benchmarking of Cryptographic Hardware using FPGAs, IEEE Symposium on Field-Programmable Custom Computing Machines -- FCCM 2010, May, 2010

Technical Reports

  • Rajesh Velegalati and Panasayya Yalla, Differential Power Analysis Attack on FPGA Implementation of AES, George Mason University - ECE Department, May, 2008 [Bibtex]