Call me for my pic/wait3days

Rajesh Velegalati

Ph.D Candidate

Education

  • Ph.D in Electrical & Computer Engineering at George Mason University, Fairfax, VA.
  • Aug. 2009 -- Present
  • Master of Science in Computer Engineering at George Mason University, Fairfax, VA.
  • Jan. 2007 -- July 2009
  • Bachelor of Engineering in Electrical & Electronics Engineering at Sir C.R.Reddy College of Engineering, AFF to Andhra University, India.
  • Sept. 2002 -- May. 2006

    Experience

  • Graduate Research Assistant at CERG,
    George Mason University
  • Jan. 2013 -- Present
  • Graduate Research Assistant at CERG, Security Lab
    George Mason University, Riscure NA
  • Sept. 2013 -- Dec. 2013
  • Research Intern at Security Lab,
    Riscure NA
  • Feb. 2013 -- Aug. 2013
  • Graduate Research Assistant at CERG,
    George Mason University
  • Aug. 2012 -- Jan. 2013
  • Graduate Research Assistant at CERG,
    George Mason University
  • Aug. 2011 -- July 2012
  • Graduate Research Assistant at CERG,
    George Mason University
  • Aug. 2010 -- July 2011
  • Graduate Research Assistant at CERG,
    George Mason University
  • Aug. 2009 -- July 2010
  • Graduate Teaching Assistant at ECE Dept., George Mason University
  • Jan. 2009 -- May 2009

    Technical Skills

    Hardware Description Language

    • VHDL & Verilog HDL
    • Xilinx Design Language

    Programming Languages

    • C, Perl, Python, MSDOS and Shell Scripting, POSIX, HTML, CSS
    • LaTeX, Working Knowledge of C++ and Assembly (x86)

    Softwares

    • Xilinx ISE; Xilinx Planahead, Xilinx EDK, Altera QuartusII, Actel Libero, MatLab, Octave
    • ActiveHDL, ModelSim, Synopsis Synplify-Pro, Design Compiler, Astro
    • Eagle, MS Visual Studio; {MS \& Open Office Suites}, FTK Imager, EnCase Forensic

    Programmable Hardware

    • Xilinx, Altera, Actel FPGAs