GEORGE MASON UNIVERSITY

ELECTRICAL AND COMPUTER ENGINEERING DEPARTMENT

Fall 2008        ECE 680:  Physical VLSI Design

Time and location:  Thursday 7:20 pm – 10:00 pm, Krug Hall 209

Instructor:  Qiliang Li, S&T-II, Room 249, Tel 703-993-1596, Fax 703-993-1601 qli6@gmu.edu

Office Hours:  Thursday 3:00 – 5:00 pm; other times by appointment. 

Course OBJECTIVES

This course is to provide the fundamental knowledge on CMOS digital circuit design. From this course, the students will learn to analyze, design, layout, simulate and optimize transistor-level digital circuits and systems. The students will use state-of-the art computer-aided design (CAD) tools to layout, simulate and verify the circuits.

PREREQUISITES:

ECE586 Digital Integrated Circuit Analysis and Design. Knowledge of MOSFET and CMOS inverter is required.

Textbook: “Digital Integrated Circuits: A Design Perspective” 2nd Edition by J. M. Rabaey, A. Chandrakasan and B. Nikolic, Prentice Hall, 2003.

REFERENCE LIST

“CMOS Digital Integrated Circuits: Analysis and Design” 3rd Ed., by Sung-Mo Kang and Yusuf Leblebici, Mc Graw Hill, 2003

"Modern VLSI Design" 3^rd Ed., by W. Wolf, Prentice Hall, 2002.

COURSE OUTLINE

1.      Overview of CMOS VLSI (1/2 week)

2.      Manufacturing Process of CMOS Integrated Circuit (1/2 week)

3.    CMOS Inverter, Combinational CMOS Logic and Layout (1.5 weeks)

4.    Designing Sequential Logic Circuits (2 weeks)

5.    Implementation strategies for Digital Integrated Circuits (2 weeks)

6.    Coping with Interconnect (2 weeks)

7.    Timing Issues of Digital IC (2 weeks)

8.    Designing Arithmetic Building Blocks (1 week)

9.    Designing Memory and Array structures (1 week)

GRADING

Homework/project      - 40%

Midterm Exam            - 30%

Final Exam                  - 30% 

The dates of the Midterm exam will be announced in class at least two weeks before the exam, and will depend on the course progress.

Lecture Note:

• Chapter I Introduction and Overview of CMOS VLSI

Lecture Note pdf file 08/28/2008

• Chapter II Manufacturing Process of CMOS IC

Lecture Note pdf file 09/04/2008

• Chapter III CMOS Transistor, Inverter, Combinational Logic and Layout

Part 1 The MOS Transistor Lecture Note pdf file09/04/2008

Part 2 Inverter Lecture Note pdf file 09/11/2008

Homework 1 due by 9/18/2008

Part 3 CMOS Combinational Logic and Layout Lecture Note pdf file 09/18/2008

• Chapter IV Designing Sequential Logic Circuits

Lecture Note pdf file 09/18/2008

Homework 2 due by 10/02/2008

• Chapter V Implementation Strategies for Digital ICs

Lecture Note pdf file for 10/02/2008

Homework 3 due by 10/16/2008

Lecture Note pdf file for 10/09/2008