Marcin Rogawski

Ph.D. Candidate
Cryptographic Engineering Research Group
Electrical and Computer Engineering
George Mason University

I am a Ph.D. student, under Prof. Kris Gaj at the GMU Electrical and Computer Engineering, in the Cryptographic Engineering Research Group. My research focus is cryptography, information security, algorithms and hardware/software applications of cryptography.

My M.Sc. dissertation in Computer Science, at the Military University of Technology, Cybernetics Department, Institute of Mathematics and Cryptology, investigated Analysis of hardware implementation Hierocrypt-3 algorithm.

E-mail:	mrogawsk(at)gmu.edu
Office:	room 3231 in Engineering Building II
PGP Key:
Mailing address:	4400 University Drive, Farifax VA 22030, USA

Publications and Talks:

Marcin Rogawski, Kris Gaj and Ekawat Homsirikamol An FPGA-based Accelerator for Tate Pairing on Edwards curves over Prime Fields, Cryptoarchi '13, Kris Gaj's [talk]
Marcin Rogawski, Kris Gaj and Ekawat Homsirikamol A High-Speed Unified Hardware Architecture for 128 and 256-bit Security Levels of AES and the SHA-3 Candidate Groestl accepted to Journal of Microprocessors and Microsystems,
Kris Gaj, Ekawat Homsirikamol, Marcin Rogawski, Rabia Shahid and Malik Umar Sharif - Comprehensive Evaluation of High-Speed and Medium-Speed Implementations of Five SHA-3 Finalists Using Xilinx and Altera FPGAs Cryptology ePrint Archive: Report 2012/368, first version - Jun. 2012
[link]
Pawel Morawiecki, Marian Srebrny, Ekawat Homsirikamol and Marcin Rogawski - Security margin evaluation of SHA-3 contest finalists through SAT-based attacks 11th International Conference on Information Systems and Industrial Management, Venice, Italy, 25-28 September 2012 - Best Student Paper Award [link]
[pdf] [ePrint version]
Marcin Rogawski and Kris Gaj - A High-Speed Unified Hardware Architecture for the AES and SHA-3 Candidate Groestl 15th EUROMICRO Conference on Digital System Design -DSD'12, Izmir, Turkey, 5-8 September 2012 [pdf] and Kris Gaj's [talk]
Kris Gaj, Ekawat Homsirikamol, Marcin Rogawski, Rabia Shahid, Malik Umar Sharif - Comprehensive Evaluation of High-Speed and Medium-Speed Implementations of Five SHA-3 Finalists Using Xilinx and Altera FPGAs The 3rd SHA-3 Candidate Conference, March 22-23, 2012
[pdf] and Kris Gaj's [talk]
Frank Gurkaynak, Kris Gaj, Beat Muheim, Ekawat Homsirikamol, Christoph Keller, Marcin Rogawski, Hubert Kaeslin, Jens-Peter Kaps - Lessons Learned from Designing a 65nm ASIC for Evaluating Third Round SHA-3 Candidates The 3rd SHA-3 Candidate Conference, March 22-23, 2012
[pdf] and Frank Gurkaynak's [talk]
Marcin Rogawski and Kris Gaj - Groestl Tweaks and their Effect on FPGA Results Cryptology ePrint Archive: Report 2011/635, first version - Nov. 2011
[link]
Rabia Shahid, Malik Umar Sharif, Marcin Rogawski and Kris Gaj - Use of Embedded FPGA Resources in Implementations of 14 Round 2 SHA-3 Candidates, The 2011 International Conference on Field-programmable Technology (FPT 2011) New Delhi, India, Dec. 12-14 2011
[pdf] and Kris Gaj's talk
Ahmad Salman, Marcin Rogawski and Jens Peter Kaps - Efficient Hardware Accelerator for IPSec based on Partial Reconfiguration on Xilinx FPGAs, 2011 International Conference on ReConFigurable Computing and FPGAs - ReConFig 2011, Nov.30 - Dec. 2, 2011, Cancun, Mexico
[pdf] and Ahmad Salman's [talk]
Ekawat Homisirikamol, Marcin Rogawski and Kris Gaj - Throughput vs. Area Trade-oArchitectures of Five Round 3 SHA-3 Candidates Implemented Using Xilinx and Altera FPGAs, Workshop on Cryptographic Hardware and Embedded Systems 2011 (CHES 2011) Nara, Japan, Sep. 2011
[pdf] and Ekawat 'Ice' Homsirikamol's talk
Marcin Rogawski, Rabia Shahid, Umar Sharif and Kris Gaj - Design Trade-offs in the Implementations of 14 Round 2 SHA-3 Candidates using Embedded Resources of Altera and Xilinx FPGAs, Cryptoarchi 11 Bochum, Germany, Jun. 2011
[abstract] [talk]
Malik Umar Sharif, Rabia Shahid, Marcin Rogawski, Kris Gaj - Use of Embedded FPGA Resources in Implementations of Five Round Three SHA-3 Candidates Ecrypt II Hash workshop - Tallinn, Estonia, May 19-20 2011
[pdf] [talk]
Ekawat Homsirikamol, Marcin Rogawski, and Kris Gaj - Comparing Hardware Performance of Round 3 SHA-3 Candidates using Multiple Hardware Architectures in Xilinx and Altera FPGAs Ecrypt II Hash workshop - Tallinn, Estonia, May 19-20 2011
[pdf]
Ekawat Homsirikamol, Marcin Rogawski, and Kris Gaj - Comparing Hardware Performance of Fourteen Round Two SHA-3 Candidates Using FPGAs Cryptology ePrint Archive: Report 2010/445, first version - Aug. 2010
[link]
Kris Gaj, Jens-Peter Kaps, Venkata Amirineni, Marcin Rogawski, Ekawat Homsirikamol, Benjamin Y. Brewster - ATHENa - Automated Tool for Hardware EvaluatioN: Toward Fair and Comprehensive Benchmarking of Cryptographic Hardware using FPGAs, 20th International Conference on Field Programmable Logic and Applications Milano, Italy, Aug. 2010 - Best Paper in the category "FPL Community Award"
[pdf] and Kris Gaj's talk
Kris Gaj, Ekawat Homisirikamol and Marcin Rogawski - Comprehensive Comparison of Hardware Performance of Fourteen Round 2 SHA-3 Candidates with 512-bit Outputs Using Field Programmable Gate Arrays, SHA-3 Candidate Conference Santa Barbara, CA, USA, Aug. 2010
[pdf]
Kris Gaj, Ekawat Homisirikamol and Marcin Rogawski - Fair and Comprehensive Methodology for Comparing Hardware Performance of Fourteen Round Two SHA-3 Candidates using FPGAs, Workshop on Cryptographic Hardware and Embedded Systems 2010 (CHES 2010) Santa Barbara, CA, USA, Aug. 2010
[pdf] and Kris Gaj's talk
Kris Gaj, Ekawat Homisirikamol and Marcin Rogawski - SHA3 Competition in Hardware, Cryptoarchi 10 Paris, France, Jun. 2010
[abstract] [talk]
Kris Gaj, Jens-Peter Kaps, Venkata Amirineni, Marcin Rogawski, Ekawat Homsirikamol, Benjamin Y. Brewster, John Pham, and Michal Varchola - ATHENa - Automated Tool for Hardware EvaluatioN: Toward Fair and Comprehensive Benchmarking of Cryptographic Hardware using FPGAs, Cryptoarchi 10 Paris, France, Jun. 2010
[abstract]
Kris Gaj, Soonhak Kwon, Patrick Baier, Paul Kohlbrenner, Hoang Le, Mohammed Khaleeluddin, Ramakrishna Bachimanchi, Marcin Rogawski - Area-Time Efficient Implementation of the Elliptic Curve Method of Factoring in Reconfigurable Hardware for Application in the Number Field Sieve, IEEE Transactions on Computers 28 Dec. 2009. IEEE computer Society Digital Library. IEEE Computer Society
[abstract] [pdf]
K. Gaj, D. Hwang, E. Homisiirikamol, X. Xin, M. Rogawski - Implementing SHA1 and SHA2 Standards on the Eve of SHA3 Competition, Cryptoarchi 09 Prague, Czech Rep., Jun. 2009
[abstract] [talk]
K. Gaj, M. Varchola, E. Homisiirikamol, V. Amiramieni, R. Velegelati, M. Rogawski - Fair Comparison of Hardware Implementations of Cryptography without Revealing the Source Codes, Cryptoarchi 09 Prague, Czech Rep., Jun. 2009
[abstract]
K. Gaj, M. Huang, M. Rogawski - New Efficient Hardware Architectures for Montgomery Modular Multiplication, Virginia Tech Blacksburg, USA, Nov 2008
[talk]
M. Rogawski - Hardware evaluation of eSTREAM Candidate - comparison, ENIGMA XI Warsaw, Poland, May 2007
[talk]
M. Rogawski - Hardware evaluation of eSTREAM Candidates: Grain, Lex, Mickey128, Salsa20 and Trivium, SASC 2007 Bochum, Germany, Feb. 2007
[SASC] [pdf]
M. Rogawski - FPGA-based crypto co-processors with stream ciphers CryptArchi 2006 Kosice, Slovakia, Jun. 2006
M. Rogawski - Hardware-oriented stream ciphers ENIGMA X Warsaw, Poland, May 2006
[pdf] [talk]
M. Rogawski - Stream ciphers in reconfigurable device, ENIGMA IX Warsaw, Poland, May 2005
[pdf] [talk]
M. Rogawski - Architectures of crypto co-processors based on reconfigurable devices, KNI KUL - 2nd Crypto workshop Lublin , Poland, May 2004
[pdf] [talk]
M. Rogawski - Analysis of Implementation of HIEROCRYPT algorithm (and its comparison to CAMELLIA algorithm) using ALTERA devices, ENIGMA VII Warsaw, Poland, May 2003 - First award in the Contest for the best MS Thesis in the area of Cryptography and Information Security defended at a Polish university in the period 2002-2003
[ePrint] [talk]

Current Research Intrests:

Hardware and Software Implementations of SHA-1 and SHA-2 and SHA-3 competition,
Hardware and Software Implementations of Modular Arithmetic
Pairing based Cryptography
Lattice based Cryptography
Digital Signatures
Automated Tool for Hardware EvaluatioN

Teaching Assistanship for Courses:

ECE 447 Single-Chip Microcomputers - Fall 2008
ECE 511 Microprocessors - Fall 2008
ECE 448 FPGA and ASIC Design with VHDL - Spring 2009
ECE 645 Computer Arithmetic - Spring 2009

Resources:

Online Antivirus Scanner - one of the best, unfortunately IE support only. Full package available for 98/NT/2000/2003/XP/Vista and for Linux/BSD - english version available,
Polish Cryptographic Research Group - informal association of Polish young crypto researchers
Handbook of Applied Cryptography - the greatest book about cryptography
Cryptarchi -the nicest conference related to cryptographic engeneering
Explicit-Formulas Database for ECC by Tanja Lange and Daniel Bernstein

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