LIBRARY ieee ;
USE ieee.std_logic_1164.all ;
USE ieee.std_logic_unsigned.all ;

ENTITY upcount IS
   GENERIC ( m : INTEGER := 3 ) ;
	PORT ( 	Reset 		: IN 	STD_LOGIC ;
			clk		: IN 	STD_LOGIC ;
			E			: IN 	STD_LOGIC ;
			Q 			: OUT STD_LOGIC_VECTOR(m-1 downto 0 )) ;
END upcount ; 	  

ARCHITECTURE Behavior OF upcount IS		
    SIGNAL Qt : STD_LOGIC_VECTOR(m-1 downto 0);
BEGIN
	upcount: PROCESS ( clk )
	BEGIN
		IF (clk'EVENT AND clk = '1') THEN
			IF Reset = '1' THEN
				Qt <= (OTHERS => '0') ;
			ELSIF E = '1' THEN
				Qt <= Qt + 1 ;
			END IF ;
		END IF;
	END PROCESS;		
	Q <= Qt;
END Behavior ;